The present invention relates to interconnect assemblies and methods for making and using interconnections and more particularly to interconnect assemblies for making electrical contact with contact elements on a substrate such as a semiconductor integrated circuit. More particularly, the present invention relates to methods and assemblies for making interconnections to semiconductor devices to enable test and/or burn-in procedures on the semiconductor devices.
There are numerous interconnect assemblies and methods for making and using these assemblies in the prior art. For example, it is usually desirable to test the plurality of dies (integrated circuits) on a semiconductor wafer to determine which dies are good prior to packaging them and preferably prior to being singulated from the wafer. To this end, a wafer tester or prober may be advantageously employed to make a plurality of discreet pressure connections to a like plurality of discreet contact elements (e.g. bonding pads) on the dies. In this manner, the semiconductor dies can be tested prior to singulating the dies from the wafer. The testing is designed to determine whether the dies are non-functional (xe2x80x9cbadxe2x80x9d). A conventional component of a wafer tester or prober is a probe card to which a plurality of probe elements are connected. The tips of the probe elements or contact elements make the pressure connections to the respective bonding pads of the semiconductor dies in order to make an electrical connection between circuits within the dies and a tester such as an automated test equipment (ATE). Conventional probe cards often include some mechanism to guarantee adequate electrical contact for all contact elements at the bonding pads of the die regardless of the length of the contact elements or any variation in height between the two planes represented by the surface of the die and the tips of the probe pins or contact elements on the probe card. An example of a probe card having such a mechanism can be found in probe cards from FormFactor of Livermore, Calif. (also see the description of such cards in PCT International Publication No. WO 96/38858).
One type of interconnect assembly in the prior art uses a resilient contact element, such as a spring, to form either a temporary or a permanent connection to a contact pad on a semiconductor integrated circuit. Examples of such resilient contact elements are described in U.S. Pat. No. 5,476,211 and also in co-pending, commonly-assigned U.S. Patent Application entitled xe2x80x9cLithographically Defined Microelectronic Contact Structures,xe2x80x9d Ser. No. 09/032,473, filed Feb. 26, 1998, and also co-pending, commonly-assigned U.S. Patent Application entitled xe2x80x9cInterconnect Assemblies and Methods,xe2x80x9d Ser. No. 09/114,586, filed Jul. 13, 1998. These interconnect assemblies use resilient contact elements which can resiliently flex from a first position to a second position in which the resilient contact element is applying a force against another contact terminal. The force tends to assure a good electrical contact, and thus the resilient contact element tends to provide good electrical contact.
These resilient contact elements are typically elongate metal structures which in one embodiment are formed according to a process described in U.S. Pat. No. 5,476,211. In another embodiment, they are formed lithographically (e.g. in the manner described in the above-noted patent application entitled xe2x80x9cLithographically Defined Microelectronic Contact Structuresxe2x80x9d). In general, resilient contact elements are useful on any number of substrates such as semiconductor integrated circuits, probe cards, interposers, and other electrical assemblies. For example, the base of a resilient contact element may be mounted to a contact terminal on an integrated circuit or it may be mounted onto a contact terminal of an interposer substrate or onto a probe card substrate or other substrates having electrical contact terminals or pads. The free end of each resilient contact element can be positioned against a contact pad on another substrate to make an electrical contact through a pressure connection when the one substrate having the resilient contact element is pressed towards and against the other substrate having a contact element which contacts the free end of the resilient contact element. Furthermore, a stop structure, as described in the above noted application Ser. No. 09/114,586, may be used with these resilient contact elements to define a minimum separation between the two substrates.
FIG. 1 shows one technique for the use of an interconnect assembly. This interconnect 101 includes a chuck structure 117 disposed above a semiconductor wafer 111, which wafer is supported by a bellows structure 103. The chuck structure is rigid (not deformable), and the surface of the chuck 117 which includes the contact elements 125 and 127 is also rigid. The bellows structure 103 includes an expandable bellows 105 and intake and outtake ports 107A and 107B. In one use of this bellows structure, a fluid, such as water 106 is passed into and out of the bellows structure 103. A thin steel membrane 109 is welded or otherwise attached to the bellows 105. The thin membrane may be used to exert uniform pressure against the back of wafer 111 to press the top surface of the wafer against the stop structures 121 and 123, thereby causing electrical connections between the springs (or other resilient contact elements) on the wafer and the contact elements on substrate 117. This uniform pressure may overcome some variations in flatness between the meeting surfaces, such as the top surface of the wafer 111 and the surface supporting the stop structures 121 and contact elements 125 and 127. This thin steel membrane 109 also allows for the transfer of heat to or from the semiconductor wafer 111 which is disposed on top of the membrane 109. The fluid such as water 106, may be introduced into the bellows structure under pressure to force the membrane 109 into direct contact with the backside of the wafer 111.
This fluid may be heated or cooled in order to control or affect the temperature of the wafer. For example, in a burn-in test of an integrated circuit (or wafer containing integrated circuits), the fluid may be heated to raise the temperature of the wafer and then cooled, and this process may be repeated over several cycles. The chuck 117 includes stop structures 121 and 123 which are proximally adjacent to contact elements 125 and 127 respectively. It may be desirable to place a thermal transfer layer between the membrane 109 and the back of the wafer 111 to improve the heat transfer efficiency between the fluid and the wafer 111. The contact elements 125 and 127 are designed to make contact with the resilient contact elements 115 and 113 on the wafer 111. It will be appreciated that there will typically be many more resilient contact elements and many more contact elements than those shown in FIG. 1. The chuck 117 includes wiring or other interconnection in order to connect resilient contact elements 115 and 113, through contact elements 125 and 127, to a tester allowing communication of power, signals, and the like between the tester and the semiconductor wafer. The chuck 117 may be held in place by a post 118 in order to allow the wafer 111 to be pressed against the chuck 117 by the expanding of the bellows 105; alternatively, the chuck 117 may be pressed and held by a clamshell support which contacts and covers the top of the chuck 117 with a backing plate and may also surround the sides and bottom of the bellows 105.
FIG. 2 shows another example of an interconnect assembly 201. In this case, a rigid chuck 203 supports a wafer of semiconductor devices 204. The wafer includes a plurality of contact elements, such as the contact element 210A which are designed and disposed to make contact relative to resilient contact elements on the wiring substrate 206. The resilient contact elements 207, 209, and 210 are another example of a resilient element; in this case, they have a generally straight cantilever structure. The stop structures 214, 216, and 218 are attached to a rigid wiring substrate 206 and are designed to define the z separation between the wiring substrate 206 and the wafer 204. A vacuum port 212 in the wiring substrate 206 allows a vacuum to be formed between the space between the wiring substrate 206 and the chuck 203. The O-ring seal 205 ensures that a vacuum is formed between the wiring substrate 206 and the chuck 203. When the vacuum is formed, the wiring substrate 206 is pressed down towards the wafer 204 in order to cause contact to be made between the various resilient contact elements and their corresponding contact elements on the wafer 204.
FIG. 3 shows another example of an interconnect assembly 351 according to the present invention. In this case, a pressure bladder 355 forces the rigid wiring substrate 354 in contact with the wafer 353. A clamp 355A is used to press the bladder into the rigid substrate 354. The wafer 353 sits on top of a rigid chuck 352 and includes a plurality of contact elements, such as the contact element 357A shown in FIG. 3. As the bladder 355 forces the rigid wiring substrate 354 into contact with the wafer 353, the stop structures 358, 359, and 360 are brought into contact with the top surface of the wafer 353. This contact defines a separation between the rigid wiring substrate 354 and the semiconductor wafer 353. When this contact occurs, the resilient contact elements 357 are brought into mechanical and electrical contact with their corresponding contact elements on the wafer 353.
FIG. 4A shows an example of a flexible probe card device 401. This probe card device includes a flexible or deformable substrate 402 having contact elements 403, 404, and 405 disposed on one side and a plurality of electrical conductive traces which creates a wiring layer on the opposite side of the flexible substrate 402. An insulator (not shown) typically covers most of the wiring layer. The contact element 403 is electrically coupled through the via 403A to the trace 403B. Similarly, the contact element 404 is electrically coupled through the via 404A to the trace 404B on the opposite side of the flexible substrate 402. Typically, the contact elements 403, 404, and 405 are formed to have approximately the same height and they may be formed by a number of techniques to create a ball grid array or other arrangements of contactors. FIG. 4B shows an example of the use of a flexible probe card device in order to probe or test a semiconductor wafer 430. In particular, the flexible probe device 420, which resembles the device 401, is pressed into contact, by a force F, with the wafer 430. Each of the respective contact elements on the flexible probe device 420, such as the contact element 424, makes a contact with a respective contact element, such as element 434, on the wafer 430 in order to perform the probe test. The flexible probe device 420 is pressed into contact-by use of a press 410 which creates the force F.
The press 410 has a rigid, flat surface and it presses the flexible probing substrate rigidly along the entire surface of the probing substrate 420. Referring back to FIG. 4A, the press 410 presses against the surface of the substrate 402 which is opposite the contact elements 403, 404, and 405. It will be appreciated that an insulating layer may separate the press 410 from the wiring layers 403B, 404B and 405B. If one or more of the contact elements 403, 404, and 405 is smaller (e.g. shorter, etc.) than other contact elements, then it is possible for the smaller contact elements to not make contact when the flexible probing substrate is pressed into contact with a wafer. This is due to the fact that the rigid surface of the press 410 will press the contact elements into contact with a corresponding contact elements on the wafer up to the point when the largest contact elements on the flexible probing substrate have made contact with respective contact elements on the wafer. Thus, the smaller contact elements may not make contact.
FIG. 4C shows an example of how irregularities in contact elements and/or irregularities in the surfaces supporting the contact elements can cause a failure to make electrical connection. A force from a rigid press 410 causes the contact elements 424A and 424C to make contact (both mechanically and electrically). Contact elements 424A and 424C have been formed normally according to a desired size, but contact element 424B is smaller (e.g. shorter) than the desired size. This difference in size may even be within manufacturing tolerances but nevertheless is relatively shorter than its neighbors. The mechanical contact of contact elements 424A and 424C with their corresponding contact elements 434A and 434C stops the movement between the layer 420 and the IC 430, and it becomes impossible to create an electrical contact between contact element 424B and its corresponding contact element 434B.
Similar problems exist with the assemblies shown in FIGS. 1, 2, and 3. In the case of the assemblies of FIGS. 1, 2, and 3, the wiring substrate is rigid in all three cases and thus any local differential in heights of the various contact elements (or other irregularities in the two opposing surfaces) may result in a lack of contact being made. Such other irregularities may include a difference in adequate flatness between the two surfaces. The requirement to control the flatness of the two surfaces also increases the manufacturing expense for the surfaces. Furthermore, it is often difficult to achieve and maintain parallelism between the two surfaces, particularly when incorporating the need for precise x, y positional alignment control which may restrict the ability to allow for a compensating tilt. Accordingly, it is desirable to provide an improved assembly and method for making electrical interconnections and particularly in performing wafer probing and/or burn-in testing of semiconductor devices.
The present invention provides an interconnect assembly and methods for making and using the assembly. In one example of the present invention, an interconnect assembly includes a flexible wiring layer having a plurality of first contact elements and a fluid containing structure which is coupled to the flexible wiring layer. The fluid, when contained in the fluid containing structure, presses the flexible wiring layer towards a device under test to form electrical interconnections between the first contact elements and corresponding second contact elements on the device under test, which may be in one embodiment a single integrated circuit or several integrated circuits on a semiconductor wafer.
In another example of the present invention, an interconnect assembly includes a flexible wiring layer having a plurality of first contact terminals and a semiconductor substrate which includes a plurality of second contact terminals. A plurality of freestanding, resilient contact elements are mechanically coupled to one of the flexible wiring layer or the semiconductor substrate and make electrical contacts between corresponding ones of the first contact terminals and the second contact terminals.
In another exemplary embodiment of the present invention, a method of making electrical interconnections includes joining a flexible wiring layer and a substrate together in proximity and causing a pressure differential between a first side and a second side of the flexible wiring layer. The pressure differential deforms the flexible wiring layer and causes a plurality of first contact terminals on the flexible wiring layer to electrically contact with a corresponding plurality of second contact terminals on the substrate.
In a preferred embodiment, a plurality of travel stop elements may be distributed on one or both of the flexible wiring layer and the substrate.
It will be appreciated that the various aspects of the present invention may be used to make electrical connection between a single pair of contact elements on two separate substrates or may make a plurality of electrical connections between a corresponding plurality of pairs of contact elements on two different substrates. Various other assemblies and methods are described below in conjunction with the following figures.